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5-V Low Drop Voltage Regulator
TLE 7272
Features * * * * * * * * Output voltage 5 V 2% Ultra low current consumption: typ. 25A 300 mA current capability Inhibit input Reset Very low-drop voltage Short-circuit-proof Suitable for use in automotive electronics
P-TO252-5-1
Functional Description The TLE 7272 is a monolithic integrated low-drop voltage regulator for load currents up to 300 mA. An input voltage up to 42 V is regulated to VQ,nom = 5.0 V with a precision of 2%. Due to its integrated reset circuitry featuring power on timing and output voltage monitoring P-TO263-5-1 the IC is well suited as -controller supply. The sophisticated design allows to achieve stable operation even with ceramic output capacitors down to 470 nF. The device is designed for the harsh environment of automotive applications. Therefore it is protected against overload, short circuit and overtemperature conditions. Of course the TLE 7272 can be used also in all other applications, where a stabilized 5 V voltage is required. Due to its ultra low stand-by current consumption of typ. 20 A the TLE 7272 is dedicated for use in applications permanently connected to VBAT. In addition the IC can be switched off via the Inhibit input reducing the current consumption to typ. 5 A. An integrated output sink current circuitry keeps the voltage at the Output pin Q below 5.5 V even when reverse currents are applied. Thus connected devices are protected from overvoltage damage. For applications requiring extremely low noise levels the Infineon voltage regulator family TLE 42XY and TLE 44XY is more suited than the TLE 7272. A mV-range output noise on the TLE 7272 caused by the charge pump operation is unavoidable due to the ultra low quiescent current concept. Type TLE 7272 D TLE 7272 G
Data Sheet
Ordering Code Q67006-A9734 Q67006-A9735
1
Package P-TO252-5 P-TO263-5
Rev. 1.0a, 2005-02-08
TLE 7272
Reset The Reset pin informs e.g. the microcontroller in case the output voltage has fallen below the lower threshold VRT of typ. 4.65 V. The hysteresis is typically 100mV. Connecting the regulator to a battery voltage at first the reset signal remains LOW. When the output voltage has reached the reset threshold VRT the reset output RO remains still LOW for the reset delay time trd (typ. 16 ms). Afterwards the reset output turns HIGH.
1
TLE 7272
5
Q
Overtemperature Shutdown Bandgap Reference
Reset Generator
2
RO
1
4
Inhibit
Charge Pump
3 GND
AEB03523.VSD
Figure 1
Block Diagram
Data Sheet
2
Rev. 1.0a, 2005-02-08
TLE 7272
GND
I RO
INH Q
AEP02825_7272
GND Q RO INH
IEP02528
Figure 2 Table 1 Pin No. 1 2 I RO
Pin Configuration P-TO252-5 (D-PAK), P-TO263-5 (D2-PAK)(top view) Pin Definitions and Functions Symbol Function Input; block to ground directly at the IC with a ceramic capacitor. Reset Output; Open Collector Output with integrated pull-up resistor of typically 30k. Optional external pull-up resistor of 10 k to pin Q. Ground; Pin 3 internally connected to heatsink. Inhibit Input; low level disables the IC. Integrated pull-down resistor. Output; block to ground with a ceramic capacitor, C 470 nF.
3 4 5
GND INH Q
Data Sheet
3
Rev. 1.0a, 2005-02-08
TLE 7272
Table 2 Parameter Input I Voltage Current Output Q Voltage Voltage Current
Absolute Maximum Ratings Symbol Limit Values Min. Max. 45 - 5.5 6.2 - 5.5 6.2 1 45 1 150 150 V mA V V mA V V mA V mA C C - - - Unit Test Condition
VI II VQ VQ IQ VRO VRO IRO VINH IINH Tj Tstg
-0.3 -1 -0.3 -0.3 -1 -0.3 -0.3 -1 -0.3 -1 -40 -50
t < 10 s1)
- -
Reset Output RO Voltage Voltage Current Inhibit Input INH Voltage Current Temperature Junction temperature Storage temperature - - Observe current limit IINHmax2) -
t < 10 s1)
-
1) Exposure to these absolute maximum ratings for extended periods (t > 10 s) may affect device reliability. 2) External resistor required to keep the current below the absolute maximum rating when voltages 5.5 V are applied.
Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Data Sheet
4
Rev. 1.0a, 2005-02-08
TLE 7272
Table 3 Parameter Input voltage
Operating Range Symbol Limit Values Min. Max. 42 150 V C - - 5.5 -40 Unit Remarks
Junction temperature
VI Tj
Note: In the operating range, the functions given in the circuit description are fulfilled. Table 4 Parameter Junction case Junction ambient Junction ambient
1) area 300 mm2 2) Worst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80 area 300 mm2
Thermal Resistance Symbol Limit Values Min. Max. 8 80 55 K/W - K/W TO2521) - - - Unit Remarks
K/W TO2632) Worst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80 x 80 x 1.5 mm3, heat sink x 80 x 1.5 mm3, heat sink
Rthj-c Rthj-a Rthj-a
Data Sheet
5
Rev. 1.0a, 2005-02-08
TLE 7272
Application Information Table 5 Parameter Output Q Output voltage Output voltage Electrical Characteristics Symbol Limit Values Min. Typ. Max. 5.0 5.0 - - 20 - 5 250 15 5 60 0.5 - 5.1 5.1 - 800 30 40 9 500 40 20 - - - Unit Measuring Condition
VQ VQ
4.9 4.9 320 - - - - - - 40 - 20 - - 470
V V
mA mA A A A mV mV mV dB
0.1 mA1)
Output current limitation IQ Output current limitation IQ Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Quiescent current inhibited Drop voltage Load regulation Line regulation Power supply ripple rejection Temperature output voltage drift Output Capacitor Inhibit INH Turn-on Voltage Turn-off Voltage H-input current L- input current VINH ON IINH ON IINH OFF
Iq Iq Iq Vdr VQ, lo VQ, li PSRR dVQ ---------dT CQ
VQ = 0V IQ = 0.1 mA; Tj = 25 C IQ = 0.1 mA; Tj 80 C
VINH = 0 V; TJ < 80C
IQ = 200 mA Vdr = VI - VQ1) IQ = 5 mA to 250 mA Vl = 10 V to 32 V; IQ = 5 mA fr = 100 Hz; Vr = 0.5 Vpp
mV/K - nF ESR < 3
3.1 - -
- - 3 0.5
- 0.8 4 1
V V A A
VQ 4.9 V VQ 0.3 V VINH = 5 V VINH = 0 V, TJ < 80C
VINH OFF -
1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V.
Data Sheet
6
Rev. 1.0a, 2005-02-08
TLE 7272
Reset Output RO Reset switching threshold Reset Read Room
VRT VRH
4.50 - - 15 10 10 -
4.65 160 0.2 30
4.80 - 0.4 45
V mV V k k ms s
VQ decreasing VI = 6V RRO = 10 k; VQ > 1 V
Reset output low voltage VROL Internal reset pull up resistor External reset pull up resistor Reset delay time Reset reaction time
RR,int RR,ext trd trr
1)
16 - 22 12
see Fig. 3
1) An external reset pull up resistor is not required.
Data Sheet
7
Rev. 1.0a, 2005-02-08
TLE 7272
V at B
10 0 n F
T E7 7 L 22 1I Q5 40 7 n F 2 R se et G n ra r R e e to O 2 2 k
VC C
4 .7 F R se et
O rte p ra re ve m e tu Su o n h td w Bngp ada R fe n e re ce
1
eg .. Ig itio 4 IN nn H
In ib h it
Ca e h rg Pm up GD N 3
A A 3 2 .V D E052 S
Figure 3 Input, Output
Application Diagram
An input capacitor is necessary for damping line influences. A resistor of approx. 1 in series with CI, can damp the LC of the input inductivity and the input capacitor. The TLE 7272 requires a ceramic output capacitor of at least 470 nF to assure stability of the regulation loop. In order to damp influences resulting from load current surges it is recommended to add an additional electrolytic capacitor of 4.7 F to 47 F at the output as shown in Figure 3.
Data Sheet
8
Rev. 1.0a, 2005-02-08
TLE 7272
Typical Performance Characteristics Current Consumption Iq versus Junction Temperature Tj
1 _ Iq - T j .v s d
Current Consumption Iq versus Input Voltage VI
3 _ IQ - V I. V S D
Iq [ A ] V I = 1 3 .5 V
100
I q [ A ]
T j = 2 5 C
IQ = 1 0 0 A
10
40 IQ = 5 0 m A 30 IQ = 1 0 m A IQ = 0 .2 m A 20
1
10
0 .0 1 -4 0 -2 0
0
20
40
60
80 100 120 140
0
10
20
30
40
T j [ C ]
V I [V ]
Current Consumption Iq versus Output Current IQ
30
2 _ IQ - IQ .V S D
Output Voltage VQ versus Junction Temperature Tj
5 A _ V Q -T J .V S D
I q [ A ] T j = 2 5 C
20
V I = 1 3 .5 V
V Q [V ]
V I = 1 3 .5 V
T j = -4 0 C
5 .0 5
15
5 .0 0
I Q = 1 0 0 A .. . 1 0 0 m A
10
4 .9 5
5
4 .9 0
0
20
40
60
100
-4 0 -2 0
0
20
40
60
80 100 120 140
I Q [m A ]
T j [ C ]
Data Sheet
9
Rev. 1.0a, 2005-02-08
TLE 7272
Dropout Voltage Vdr versus Output Current IQ
600
6 _ V D R -IQ .V S D
Maximum Output Current IQ versus Junction Temperature Tj
620
8 _ I Q M A X - T J .V S D
V d r [m V ] T j = 1 5 0 C
400
I Q [m A ]
V I = 1 3 .5 V
580
300
T j = 2 5 C
560
200
T j = -4 0 C
540
100
520
0
100
200
300
500 -4 0 -2 0
0
20
40
60
80 100 120 140
IQ [m A ]
T j [ C ]
Dropout Voltage Vdr versus Junction Temperature Tj
600
7 _ V D R -T J .V S D
Maximum Output Current IQ versus Input Voltage VI
600
9 _ S O A .V S D
V d r [m V ]
I Q [m A ]
T j = 1 2 5 C T j = 2 5 C
I Q lim
400
IQ = 2 5 0 m A
400
300
300
IQ = 1 5 0 m A
200
200
P v m a x = 1 ,1 8 W f o r T O 2 5 2 @ 3 0 0 m m 2 c o o lin g a r e a
100
100
IQ = 1 0 m A
-4 0 -2 0 0 20 40 60 80 100 120 140
0 10 20 30 40
T j [ C ]
V I [V ]
Data Sheet
10
Rev. 1.0a, 2005-02-08
TLE 7272
Region of Stability
100
1 2 _ E S R -IQ .V S D
Output Voltage VQ Start-up behaviour
1 4 _ V It im e _ s t a r t u p . v s d
E SRCQ
[]
C Q = 1 0 n F . . .1 0 F T j = 2 5 C
V Q [V ] IN H = O N
5 .0 5
10
IQ = 5 m A
1 S t a b le R e g io n 0 .1
5 .0 0
4 .9 0
4 .8 0
0 .0 1
0
50
100
150
200
1
2
3
4
5
I Q [m A ]
t [m s ]
Power Supply Ripple Rejection PSRR versus Frequency f
80
1 3 _ P S R R .V S D
Load Regulation dVQ versus Output Current Change dIQ
0
1 8 a _ d V Q - d I Q _ V i6 V . v s d
PSRR
[d B ]
VQ
VI = 6V
[m V ]
60
IQ = 3 0 m A IQ = 1 0 0 m A
IQ = 0 .1 m A
-1 0
T j = -4 0 C
50
-1 5
T j = 2 5 C
-2 0
40
30
V R IP P L E = 1 V V IN = 1 3 . 5 V C Q = 1 0 F T a n t a lu m T j = 2 5 C
10 100 1k 10k 100k
-2 5
T j = 1 5 0 C
-3 0
0
50
100
150
250
f [H z ]
IQ [m A ]
Data Sheet
11
Rev. 1.0a, 2005-02-08
TLE 7272
Load Regulation dVQ versus Output Current Change dIQ
0
1 8 b _ d V Q - d I Q _ V i1 3 5 V . v s d
Line Regulation dVQ versus Input Voltage ChangedVI
0
1 9 _ d V Q -d V I_ _ 1 5 0 C .v s d
VQ
V I = 1 3 .5 V
[m V ]
VQ
[m V ]
IQ = 1 m A
IQ = 1 0 m A
T j = 1 5 0 C IQ = 1 0 0 m A
-1 0
-2
-1 5
T j = -4 0 C T j = 2 5 C
-3
-2 0
-4
IQ = 2 0 0 m A
-2 5 -5
T j = 1 5 0 C
-3 0 0 50 100 150 250 -6 0 5 10 15 20 25 30 35 40 45
IQ [m A ]
V I [V ]
Load Regulation dVQ versus Output Current Change dIQ
0
1 8 c _ d V Q - d I Q _ V i 2 8 V .v s d
Line Regulation dVQ versus Input Voltage ChangedVI
0
1 9 _ d V Q -d V I_ 2 5 C .v s d
VQ
VI = 28
[m V ]
VQ
T j = 2 5 C
[m V ]
-1 0
-2
IQ = 1 m A IQ = 2 0 0 m A
IQ = 1 0 m A
IQ = 1 0 0 m A
-1 5
-3
-2 0
T j = -4 0 C T j = 2 5 C
-4
-2 5
-5
T j = 1 5 0 C
-3 0 0 50 100 150 250
-6
0
5
10
15
20
25
30
35
40
45
IQ [m A ]
V I [V ]
Data Sheet
12
Rev. 1.0a, 2005-02-08
TLE 7272
Line Regulation dVQ versus Input Voltage ChangedVI
0
1 9 _ d V Q -d V I_ -4 0 C .v s d
Load Transient Response Peak Voltage dVQ
2 0 _ L o a d T r a n c ie n t v s t im e 1 2 5 . v s d
VQ
T j = 4 0 C
IQ 1 :1 0 0 m A T j= 1 2 5 C V i= 1 3 .5 V
[m V ]
-2
IQ = 1 m A
IQ = 1 0 m A IQ = 1 0 0 m A
-3
IQ = 2 0 0 m A
-4
VQ
-5
-6
0
5
10
15
20
25
30
35
40
45
T = 4 0 s /D I V
V Q = 1 0 0 m V /D I V
V I [V ]
Load Transient Response Peak Voltage dVQ
2 0 _ L o a d T r a n c ie n t v s t im e 2 5 . v s d
Line Transient Response Peak Voltage dVQ
2 1 _ L in e T r a n c ie n t v s tim e 2 5 . v s d
IQ 1 :1 0 0 m A
T j= 2 5 C V i= 1 3 .5 V
dVI 2V
T j= 2 5 C V i= 1 3 .5 V
VQ
VQ
T = 4 0 s /D I V
V Q = 1 0 0 m V /D I V
T = 4 0 0 s/D IV
V Q = 5 0 m V /D IV
Data Sheet
13
Rev. 1.0a, 2005-02-08
TLE 7272
Line Transient Response Peak Voltage dVQ
2 1 _ L in e T r a n c ie n t v s t im e 1 2 5 . v s d
Inhibit Input Current IINH versus Input Voltage VI, INH=Off
2 5 _ I IN H v s V I N IN H _ o ff . v s d
dVI 2V
T j= 1 2 5 C V i= 1 3 .5 V
[ A ] 1 .0
I IN H
IN H = O F F
0 .8
T j = 1 5 0 C T j = 2 5 C T j = -4 0 C
0 .6
VQ
0 .4
0 .2
T = 4 0 0 s/D IV
V Q = 5 0 m V /D IV
10
20
30
40
V IN [ V ]
Inhibit Input Current IINH versus Inhibit Input Voltage VINH
2 4 _ IIN H v s V IN H .v s d
Reset Threshold VRT versus Junction Temperature TJ
2 6 _ V R T V S T E M P .V S D
[ A ] 50
I IN H
T j = 1 5 0 C
V Q [V ]
V I = 1 3 .5 V
T j = 2 5 C
40 4 .9 0
T j = -4 0 C
30 4 .8 0
R e s e t R e le a s e T h r e s h o ld
20
4 .7 0 R e s e t T r ig g e r T h r e s h o ld
10
4 .6 0
10
20
30
40
-4 0 -2 0
0
20
40
60
80 100 120 140
V IN H [ V ]
T j [ C ]
Data Sheet
14
Rev. 1.0a, 2005-02-08
TLE 7272
Reset Delay TRD Time versus Junction Temperature TJ
22 [m s ]
27_R E SE TD E LAY V S T E M P .V S D
Thermal Resistance Junction-Ambient RTHJA versus Power Dissipation PV
75
3 2 _ R T H V S P V T O 2 5 2 .V S D
TRD
V I = 1 3 .5 V
R T H -J A
A = 300m m
2
[K /W ]
C o o lin g A r e a s in g le s id e d P C B
18
65
T O 2 5 2 -3
16
60
T O 2 5 2 -5
14
55
12
50
-4 0 -2 0
0
20
40
60
80 100 120 140
3
6
9
12
T j [ C ]
P V [W ]
Reset Headroom versus Junction Temperature TJ
240
28_VRT HEADR O O M VS T E M P .V S D
V Q [V ]
V I = 1 3 .5 V
160
120
80
40
-4 0 -2 0
0
20
40
60
80 100 120 140
T j [ C ]
Data Sheet
15
Rev. 1.0a, 2005-02-08
TLE 7272
Package Outlines
6.5 +0.15 -0.10
2.3 +0.05 -0.10 B A 1 0.1 0...0.15 0.9 +0.08 -0.04
10.1
5.4 0.1
9.9 0.5 6.22 -0.2
0.8 0.15
(4.17)
0.15 max per side
0.51 min
5x0.6 0.1 1.14
0.5 +0.08 -0.04 0.1
4.56
0.25
M
AB
GPT09161
All metal surfaces tin plated, except area of cut.
Figure 4
P-TO252-5-1 (Plastic Transistor Single Outline)
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. Data Sheet 16
Dimensions in mm Rev. 1.0a, 2005-02-08
TLE 7272
6.5 +0.15 -0.05 5.7 MAX.
(4.24) 1 0.1
1)
A B
0.8 0.15
2.3 +0.05 -0.10 0.5 +0.08 -0.04
(5)
9.98 0.5 6.22 -0.2
0.9 +0.20 -0.01 0...0.15
0.51 MIN.
0.15 MAX. per side
5 x 0.6 0.1 1.14
0.5 +0.08 -0.04 0.1 B
4.56
0.25 M A B
1) Includes mold flashes on each side. All metal surfaces tin plated, except area of cut.
GPT09527
Figure 5
P-TO252-5-11 (Plastic Transistor Single Outline)
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. Data Sheet 17
Dimensions in mm Rev. 1.0a, 2005-02-08
TLE 7272
10 0.2 9.8 0.15 A 8.5 1) 1.27 0.1 B 0.1 2.4
4.4
9.25 0.2
10.3
0.05
(15)
8 1)
0...0.15 5x0.8 0.1 4x1.7
8 max.
0.5 0.1
0.25
1)
M
AB
4.70.5
2.7 0.3
0.1
Typical All metal surfaces tin plated, except area of cut.
GPT09113
Figure 6
P-TO263-5-1 (Plastic Transistor Single Outline)
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. Data Sheet 18
Dimensions in mm Rev. 1.0a, 2005-02-08
Edition 2005-02-08 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 Munchen, Germany
(c) Infineon Technologies AG 2004. All Rights Reserved.
Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
TLE 7272 5-V Low Drop Voltage Regulator Revision History: 2005-02-08 Previous Version: 0.41 minor text modifications release final Version Previous Version: 1.0a minor text modifications
Rev. 1.0a
Template: ap_tmplt_a5.fm / 1 / 2004-01-01

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